Date of Completion


Embargo Period



Rajeev Bansal;Faquir Jain

Field of Study

Electrical Engineering


Master of Science

Open Access

Campus Access


This thesis describes a generalized model for lattice relaxation by plastic flow in semiconductor heterostructures. It is applicable to graded and multilayered structures, allows for changes of temperature or growth rate, and accounts for differential thermal expansion. For the implementation of this model we consider an arbitrary structure divided into a number of sublayers, each of which is assumed to have uniform properties and growth conditions. The main advantage of the generalized approach is that it accounts for the time evolution of the equilibrium strain profile, thus enabling a more accurate description of uniform layers as well as compositionally-graded structures. We have applied the generalized plastic flow model to ZnSe/GaAs (001) heterostructures grown by a two-step process using photoassisted metalorganic vapor phase epitaxy, and show good agreement between the model results and the experimentally-measured room-temperature in-plane strains. We have also calculated the apparent critical layer thicknessfor the onset of lattice relaxation as a function of experimental resolution for ZnSe/GaAs (001) grown by the two-step process or at different fixed temperatures (360oC, 480oC, and 600oC).

Major Advisor

John E Ayers